01. ISA and assembler language

Example: turn a calculator into a computer

• Addressed memory, keeping data and instructions

• Comparison-and-jump instruction (conditional)
• Stop, input and output in various ways
• Encoding an instruction: Opcode + optional parameters (addresses of arguments)

ISA conception

Instruction set architecture

• opcode / arguments / word alignment
• address arguments
  • absolute/relative address
  • indirect addressing
• immediate arguments
• Address space VS instruction size problem
  • Addressness: 3, 2, 1, 0, variable length
• Memory access speed/throughput problem
• ⇒ registers (short address / quick access)

Arddressness

• 3-address

  • + natural arithmetics

  • - there a many operations that need not 3 or even 2 operands

• 2-address

  • + More compact code

  • + Slightly faster implementation of single instruction

  • - Compound arithmetics

  • - Non-atomic conditional operations, primarily jumps

• 1-address

  • + Ultra-compact and simple implementation

  • - Most of operations are compound

  • - …part of them are just moves

  • - Unobvious human coding

• 0-address (stack)

  • +/- Requires effective hardware stack implementation, which speeds up many common algorithms

  • - Needs special training to understand and coding

  • - Needs emulation of addressing when used with arrays of data

• Variable size

  • + Effective compactness

  • - Duobles (multiplies in fact) decoding time

  • - Obstructs human reading

  • - Ambigous decoding

Modes of addressing

• Direct:
  • Moves are relatively slow comparing to inter-processor operations
  • Gives full access to memory
• Indirect:
  • Doubles slowness (multiplies in fact)
  • Can be effective with arrays processing
• Immediate:
  • Fast

  • Immutable arguments (or requires mutable code)

  • Limits argument size to be part of instruction

• Registers:
  • Fast, but mutable
  • Small address
  • Can be cheated (as part of CPU) to improve speed even more

  • There are not to many, require register planning

ISA goals

• CISC: one instruction = more operations
• RISC: one instruction = fixnum time fast operation
• VLIW: one instruction = full calculation device(s) load

H/W

• Install MARS

What is architecture anyway ?