02. Assembler, assemble language. RISC and MIPS
Supplemental: MIPS Assembly Language by Gary Shute
What is Computer_architecture, anyway?
RISC and MIPS
ISA goals:
- CISC: one instruction = more operations
- RISC: one instruction = fixnum time fast operation
- VLIW: one instruction = full calculation device(s) load
MIPS_architecture: super-brief history of MIPS and RISC
RISC principles as implemented by MIPS architecture.
Assembler and assembler language
- ISA is not intended to human directly
- E. g. MIPS:
- E. g. MIPS:
- Numbers are far less mnemonic than names
- Jumps are fragile to code refactoring
- …
⇒ Autocode, a human writable language mutually identical to machine («binary») code
⇒ Assembler, a program that translates from autucode to binary
- Hence, «the assembler language»
One glance example: MARS
- Memory (code and data)
- Registers
- Assembler
- Very simple program
MIPS32 ISA basics
Registers, (almost) no flags
- Memory access limitations
- Only memory fetch / memory store instructions allowed in the sake of efficiency
- 3-addressing ⇒ atomic conditionals
⇒ slightly sparse code (e. d. add $t2 $t2 $t3)
- 3 types of addressing
- Direct (register number in instruction code)
- Immediate (small integer in instruction code)
Indirect (register number in instruction code, the register itself contains an address of an operand)
- 3 types of instructions:
bits
31…26
25…21
20…16
15…11
10…6
5…0
6
5
5
5
5
6
R (Register)
op
rs
rt
rd
sa
funct
I (Immediate)
op
rs
rt
immediate
J (Jump)
op
target
- Assembly: pseudoinstrucions
E. g. no «register move» instruction: move $t1 $t2 == addu $t1 $zero $t2
Multi-instructional; special use of $at.
- Exceptions for everyday use, e. g. arithmetic overflow:
TODO